2. Basic Features and Design Details

The 6tcw is powered by a Brecis MSP 2000 RISC-based (MIPS) processor. It's clocked at 150MHz, includes an on-chip hardware accelerator for DES, 3DES, MD5, and SHA-1, and is spec'd to have 40Mbps 3DES performance.

Figure 1: internal view
(click on the image for a full-sized view)

Figure 1 shows the internal layout including the PC card radio, which looks to be a PRISM 2.5-based ZCom XI-325. The radio is cabled to two RP-SMA style connectors that have two moveable, jointed dipole antennas attached.